1. Field of the Invention
This invention relates to a superconducting integrated circuit that has included superconducting components, such as superconducting tunnel junction components and microbridge components, and to a method for the fabrication thereof.
2. Description of the Prior Art
Heretofore, in the fabrication of a superconducting tunnel junction (Josephson) device which is an active component in a superconducting integrated circuit, a silicon oxide film or silicon nitride film has been used as the material for an insulating interlayer film intended to effect insulation between an upper electrode and a lower electrode. The insulation characteristics and dielectric characteristics of the insulating film have an effect on the signal transmission characteristics of the wiring and on the electric characteristics of the superconducting tunnel junction device as well. Particularly, the changes in the characteristic properties of the junction component have a great effect as well on the operation characteristics of the superconducting integrated circuit and, therefore, have posed an important problem to be solved.
Thus, the material that is used for the insulating interlayer film is expected to excel in the insulating characteristics and to show a low dielectric constant. A material which is capable of fully satisfying these conditions and is as well applicable to the fabrication of a superconducting tunnel junction device has not been reported until now.
As heretofore known means for forming an insulating film, there are at present available a method of producing an insulating interlayer film that comprises depositing an insulating film on the entire surface of a substrate by the technique of sputtering or the technique of evaporation using vacuum equipment, then patterning the insulating film by means of a photo resist and forming via holes in the insulating film by the technique of dry etching, and a method of forming an insulating interlayer film that comprises applying a photo resist to a substrate, patterning the applied layer of photo resist, depositing an insulating film on the patterned layer of photo resist by the technique of sputtering or the technique of evaporation using vacuum equipment and separating unnecessary layers by the lift-off technique. These methods invariably necessitate use of highly expensive vacuum equipment and encounter difficulty in ensuring reliability of the formation of via holes because they entail large numbers of steps.
Now, the process for fabricating a superconducting tunnel junction device that uses a conventional insulating interlayer film, such as of low-temperature-formed silicon dioxide, will be described below with reference to FIG. 4 and FIG. 5.
FIG. 4 depicts a process for forming an insulating interlayer film that comprises depositing an insulating film, applying a photo resist to the entire surface of a substrate, patterning the layer of photo resist by the lithographic technique and forming via holes in the layers by the dry etching technique.
First, a protective layer 2 against dry etching is formed on a substrate 1, a tunnel junction having a structure of upper electrode 4 tunnel barrier 5/lower electrode 3 is deposited by the sputtering technique, then a resist pattern for the lower electrode and a resist pattern for the upper electrode are formed by the photolithographic technique, and a tunnel junction component and a lower wiring layer are respectively worked out by dry etching, as illustrated in FIG. 4(a).
Subsequently, an insulating layer 21 of a silicon dioxide film, silicon oxide film or silicon nitride film is deposited on the entire surface of the substrate 1 by the sputtering technique or the evaporation technique without heating the substrate for the purpose of insulating the upper and lower electrodes 4 and 3, as illustrated in FIG. 4(b). Incidentally, since the superconducting tunnel junction component, when heated to a temperature of higher than 150° C., induces deterioration of the electrical properties, it is a general rule to avoid heating the substrate in the fabrication process.
Furthermore, a photo resist 22 is applied onto the entire surface of the insulating film on the substrate 1, as illustrated in FIG. 4(c).
Next photo resist patterns 23a and 23b, which are intended to be used for forming via holes in the insulating layer to get electrical contacts with the upper and lower electrodes, are formed by the use of the photolithographic technique, as illustuated in FIG. 4(d).
Subsequently, via holes 24a and 24b respectively reaching the electrodes 3 and 4 are formed by the technique of dry etching using vacuum equipment as illustrated in FIG. 4(e).
Next, the photo resists are removed to complete an insulating interlayer film, as illustrated in FIG. 4(f).
Finally, a wiring electrode layer is deposited over the entire source of the substrate by the sputtering technique, then photo resist patterns to be used for wiring are formed by the photolithographic technique, and a wiring 8 is formed by dry etching to complete a superconducting tunnel device, as illustrated in FIG. 4(g).
FIG. 5 depicts a process which comprises applying a photo resist to the entire surface of a substrate, imparting shapes of prospective via holes to the applied layer of the photo resist by the lithographic technique, then depositing an insulating film, and forming an insulating interlayer film by the lift-off technique.
First, a protective layer 2 against dry etching is formed on a substrate 1, a tunnel junction having the structure of upper electrode 4/tunnel barrier 5/lower electrode 3 is deposited thereon, then a lower electrode pattern and an upper electrode pattern are formed by the photolithographic technique, and a tunnel junction component and a lower wiring layer are formed by dry etching, as illustrated in FIG. 5(a).
A photo resist 22 is subsequently applied to the entire surface of the substrate 1, as illustrated in FIG. 5(b).
Next, the photo resist is removed from the applied layer of photo resist excepting the positions at which the via holes to get electrical contacts with the upper electrode 4 and the lower electrode 3 are expected to be formed by the use of the photolithographic technique to form the photo resist patterns 22a and 22b in the shapes of the prospective via holes, as illustrated in FIG. 5(c).
Subsequently, an insulating layer 21, such as of a silicon dioxide film, silicon oxide film or silicon nitride film is deposited by the sputtering technique or the evaporation technique on the entire surface of the substrate 1 with the object of insulating the upper and lower electrodes, as illustrated in FIG. 5(d).
The photo-resist patterns 22a and 22b are removed by the lift-off technique to complete an insulating interlayer film as illustrated in FIG. 5(e).
Finally, a wiring electrode layer is deposited on the entire surface of the insulating interlayer film by the sputtering technique, then the photo resist pattern to be used for wiring is formed by the photolithographic technique, and a wiring layer is worked out by dry etching to form a wire 8 to complete a superconducting tunnel component, as illustrated in FIG. 5(f).
As already pointed out, in the insulating film which is intended to effect electric insulation of the upper electrode and the lower electrode in the production of the superconducting tunnel junction (Josephson) device, the insulating characteristics and the dielectric characteristics thereof may affect even the characteristic properties of the superconducting tunnel junction device. If the insulating film exhibits inferior insulating characteristics and entails the occurrence of a leak current, for example, these defects will manifest themselves in a form superposed on the subgap leak property of a junction component. Thus, the changes in the characteristic properties of the junction component greatly affect the operation characteristics of the superconducting integrated circuit. In terms of these insulating characteristics and dielectric characteristics, the low-temperature-formed silicon oxide film and silicon nitride film that have been used as the materials for the conventional insulating films have not been fully satisfactory. Particularly, since the silicon oxide film contains oxygen, it has proved to be an unfavorable material for the niobium superconductor that tends to induce deterioration of the superconducting property by diffusion of oxygen. Since the formation of via holes in the insulating layer is implemented by dry etching, the wiring layer and the resistor layer which are exposed after the formation of via holes suffer loss of thickness due to dry etching and sustain damage of dry etching and consequently pose a serious hindrance to the formation of proper electrical contacts.
The insulating layer of the signal line is preferably made of a material having a low dielectric constant because the signal transmission speed through this line increases in proportion as the dielectric constant of the insulating interlayer film decreases.
An object of this invention is to provide a superconducting integrated circuit which permits the technique for forming an insulating interlayer film to be simplified because of a marked decrease in the number of steps as compared with the conventional technique, enjoys an enhanced reliability of the wiring, and enables the yield of device to be exalted and to provide a method for the mass production thereof.
Another object of this invention is to provide a superconducting integrated circuit which permits an insulating film to be deposited by a simple and convenient method of application without using vacuum equipment, allows a decrease in the number of steps of process by forming via holes exclusively by the lithographic technique, and consequently enjoys an enhanced reliability of the process for the formation of via holes.